In recent years, a nonvolatile semiconductor memory having a structure in which a nanoparticle layer containing conductive nanoparticles such as Si nanocrystals is inserted into a tunnel oxide film has been developed as an evolved MONOS nonvolatile semiconductor memory. This memory has a structure in which using a tunnel current, charges are exchanged between an Si surface and the trap level in a silicon nitride film (charge storage layer) via a double tunnel junction sandwiching the Si nanocrystals satisfying the Coulomb blockade condition between the tunnel oxide films.
In the semiconductor memory of this type, in the memory retention mode, an energy barrier ΔE by the Coulomb blockade effect and quantum confinement of the Si nanocrystals blocks the information charge tunnel. This allows to exponentially improve the storage retention characteristics in accordance with exp(ΔE/kBT). In the write/erase mode, since an appropriate write/erase voltage is applied to the memory, the information electrons tunnel without receiving an influence of the energy barrier ΔE. This allows to perform high-speed write/erase.
When the particle size of the Si nanocrystals decreases, the energy barrier ΔE by the Coulomb blockade effect and quantum confinement increases, thereby improving the memory retention characteristics. When the particle size of the Si nanocrystals to assure the storage retention capability decreases and the energy barrier ΔE increases, degradation occurs due to a low energy barrier in the write/erase mode. That is, when the reduction of the particle size of the Si nanocrystals progresses, the energy barrier ΔE increases to exponentially improve the memory retention characteristics. However, the appearance of a low energy barrier in the write/erase mode starts to exponentially decrease the write/erase rate.
An increase in write/erase voltage allows to eliminate the low energy barrier. In this case, the increase in the write/erase voltage results in loss of device reliability. The memory retention improvement is undesirably insufficient while low-voltage high-speed write/erase is maintained.